A circuit U containing only (CNOT, RZ) gates is called a phase polynomial. Such a circuit can be fully described by mapping computational basis states ∣x⟩=∣x1,..,xn⟩ on n qubits with xi∈{0,1} as
∣x⟩=e−i2θ(1−2⋅PTx)∣Px⟩.
Let us go through each of the components:
The matrix P is the so-called parity matrix and tracks the logical manipulation of the input vector ∣x⟩. For circuits containing only CNOT gates, it is a full description and its own intermediate representation (IR).
When additional phase gates RZ(θ)=e−i2θZ are involved, we need to additionally track the accumulated phase of the circuit. This is done in the so-called parity table PT. First, let us note that the action of a phase gate on a computational basis state is given by
RZ(θ)∣x⟩=e−i2θ(1−2x)∣x⟩.
A CNOT gate may alter the current state ∣x⟩ of the circuit, and we call the values of x the current parity at that point in the circuit.
Whenever there is a phase gate, we collect the current parity on the qubit the gate is acting on. The collection of those parities is the parity table.
This is best understood by going through a simple example: Let us start with the state ∣x1,x2⟩ and apply a CNOT1,2 gate,
CNOT1,2∣x1,x2⟩=∣x1,x1⊕x2⟩,
where the action is simply adding the control qubit value to the target qubit value. This is the same in the parity matrix IR.
Now, applying an RZ2(θ) rotation on the second qubit collects its current parity x1⊕x2,
We can go through the detailed example on the overview page. We go through each gate by hand and simply note the current parities in the circuit whenever they are altered.
By noting the current parities inside the circuit at each point of a new gate we can directly read out the parity table and parity matrix. Image taken from [1].
In particular, we get the phase factors θ1(x1⊕x2), θ2(x1⊕x2⊕x3), and θ3(x1⊕x3⊕x4), corresponding to the parity table
⎝⎛111110011001⎠⎞,
as well as the parity matrix
⎝⎛1100100011100101⎠⎞,
which is just the collection of final parities at the end of the circuit.